Note that not all processors implement all defined Huge/Large page sizes.

The processor implements all of the ESA/390 and XA instructions which prevents the need for instruction translation.

Each processor has its own local memory, implemented in DRAM.

The register cache structure was an architectural relabeling of what previous processors had implemented as a distributed mux.

The processor implements the CISC z/Architecture and has four cores.

All processors implement the Base category.

In the embedded processor market, essentially all modern processors implement JTAG when they have enough pins.

Often these processors also implement simultaneous multithreading (SMT).

The following processors implement the AMD64 architecture:

The following processors implement the Intel 64 architecture: