Random test generators (often abbreviated RTG) are a type of computer software that is used in functional verification of microprocessors.

Suitability for purpose is verified by functional verification.

The goal is normally debugging and functional verification of the system being designed.

Thus, comprehensive functional verification is key to reducing development costs and delivering a product on time.

Equivalence is not to be confused with functional correctness, which must be determined by functional verification.

This includes functional verification.

This is the hardest part, and the domain of functional verification.

Analog verification is built on the idea that transistor level simulation will always be too slow to provide adequate functional verification.

In software testing, completeness has for goal the functional verification of call graph (between software item) and control graph (inside each software item).

SystemC is applied to system-level modeling, architectural exploration, performance modeling, software development, functional verification, and high-level synthesis.